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mcrxr
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
00000
Definition
Operation
Description
MOTOROLA
mcrxr
crfD
3
4
5
6
7
CRFD
19
20
21
22
23
Move to Condition Register from XER
CR[4 ∗ crfD–4 ∗ crfD + 3] ← XER[0–3]
XER[0–3] ← 0b0000
The contents of XER[0–3] are copied into the condition register
field designated by crfD. All other fields of the condition register
remain unchanged. XER[0–3] is cleared.
Other registers altered:
Condition Register (CR field specified by operand crfD):
Affected: LT, GT, EQ, SO
XER[0–3]
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—mcrxr
8
9
10
11
12
00
00000
24
25
26
27
28
512
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
29
30
31
0
FORM
X
B-91
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