Motorola MPC823e Reference Manual page 975

Microprocessor for mobile computing
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CBDREQ2
Figure 17-2. Internal DMA Request Logic
17.5 PROGRAMMING THE PCMCIA INTERFACE
The following section describes the PCMCIA interface programming model. All registers are
memory-mapped within the internal control register area. The following registers are used
to control the PCMCIA interface.
17.5.1 PCMCIA Interface Input Pins Register
The PCMCIA interface input pins register (PIPR) is used to sample the PCMCIA input port
signals. When the PCMCIA controller is not operating, bits 16-23 of the PIPR can be used
to read from and write to the IP_B[0:7] pins as general-purpose I/O pins.
PIPR
BIT
0
1
2
FIELD
RESET
R/W
ADDR
BIT
16
17
18
FIELD
CBVS1
CBVS2
CBWP
CBCD2
RESET
R/W
R/W
R/W
R/W
ADDR
NOTE: — = Undefined.
Bits 0–15—Reserved
These bits are reserved and must be set to 0.
MOTOROLA
IOIS16_B
SPKR
CBDREQ1
MULTIPLEXER
INTERNAL DMA REQUEST
3
4
5
6
7
RESERVED
R/W
(IMMR & 0xFFFF0000) + 0xF0
19
20
21
22
23
CBBVD
CBBVD
CBCD1
CBRDY
2
1
R/W
R/W
R/W
R/W
R/W
(IMMR & 0xFFFF0000) + 0xF0
MPC823e REFERENCE MANUAL
PCMCIA Interface
DREQ2
PORT C
LOGIC
PORT C DREQ2
8
9
10
11
12
24
25
26
27
28
RESERVED
R/W
13
14
15
29
30
31
17-9

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