MPC823e Instruction Set—bclr
B-26
The branch target address is LR[0-29] || 0b00.
If LK = 1, then the effective address of the instruction following
the branch instruction is placed into the link register.
Other registers altered:
Affected: Count Register (CTR) (if BO[2] = 0)
Affected: Link Register (LR) (if LK = 1)
Simplified mnemonics:
bltlr
equivalent to
bnelr
cr2
equivalent to
bdnzlr
equivalent to
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
bclr
12,0
bclr
4,10
bclr
16,0
SUPERVISOR
OPTIONAL
LEVEL
MOTOROLA
FORM
XL