Motorola MPC823e Reference Manual page 1268

Microprocessor for mobile computing
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MPC823e Instruction Set—nor
nor
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
B-110
nor
rA,rS,rB (Rc = 0)
nor.
rA,rS,rB (Rc = 1)
3
4
5
6
7
19
20
21
22
23
NOR
rA ← ¬ ((rS) | (rB))
The contents of rS are ORed with the contents of rB and the
complemented result is placed into rA. nor with rS = rB can be
used to obtain the one's complement.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
Simplified mnemonics:
not
rD,rS
equivalent to
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
8
9
10
11
12
S
24
25
26
27
28
124
nor
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
RC
rA,rS,rS
FORM
X
MOTOROLA

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