Motorola MPC823e Reference Manual page 1051

19.4.1 Video RAM Word Format
The video RAM word specifies the timing of all external signals controlled by the video
controller.
VIDEO RAM WORD
BIT 0 1 2
FIELD HR HF VR
RESET — — —
R/W R/W R/W R/W
ADDR
BIT 16 17 18
FIELD INT RESERVED
RESET — —
R/W R/W R/W
ADDR
NOTE: — = Undefined.
HR—Horizontal Sync on Rising Edge of the Clock
0 = The value of the HSYNC signal will be 0 after the rising edge of the clock.
1 = The value of the HSYNC signal will be 1 after the rising edge of the clock.
HF—Horizontal Sync on Falling Edge of the Clock
0 = The value of the HSYNC signal will be 0 after the falling edge of the clock.
1 = The value of the HSYNC signal will be 1 after the falling edge of the clock.
VR—Vertical Sync on Rising Edge of the Clock
0 = The value of the VSYNC signal will be 0 after the rising edge of the clock.
1 = The value of the VSYNC signal will be 1 after the rising edge of the clock.
VF—Vertical Sync on Falling Edge of the Clock
0 = The value of the VSYNC signal will be 0 after the falling edge of the clock.
1 = The value of the VSYNC signal will be 1 after the falling edge of the clock.
FR—Field on Rising Edge of the Clock
0 = The value of the FIELD signal will be 0 after the rising edge of the clock.
1 = The value of the FIELD signal will be 1 after the rising edge of the clock.
FF—Field on Falling Edge of the Clock
0 = The value of the FIELD signal will be 0 after the falling edge of the clock.
1 = The value of the FIELD signal will be 1 after the falling edge of the clock.
MOTOROLA
3 4 5 6 7
VF FR FF BR BF
— — — — —
R/W R/W R/W R/W R/W
(IMMR & 0xFFFF0000) + 0xB00–0xBFE
19 20 21 22 23
LCYC/CNT
(IMMR & 0xFFFF0000) + 0xB00–0xBFF
MPC823e REFERENCE MANUAL
8 9 10 11 12
RESERVED
—
R/W
24 25 26 27 28
—
R/W
Video Controller
13 14 15
VDS
—
R/W
29 30 31
LP LST
— —
R/W R/W
19-17