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Communication Processor Module
If a serial communication controller is configured to operate using the time-slot assigner of
the serial interface, then the data is received and transmitted using the L1TXDx and L1RXDx
pins. The collision sensing is still obtained from the individual serial communication
controller CTSx pin, so the CTSx pin must be configured in port C to connect to the preferred
serial communication controller. Since a serial communication controller only receives
clocks during its time-slot, the CTSx pin is only sampled during the transmit clock edges of
the particular serial communication controller time-slot.
16.9.17.3 HDLC BUS MEMORY MAP AND PROGRAMMING.The HDLC bus on the
MPC823e is implemented using the SCCx in HDLC mode with certain bits set. If you want
to do otherwise, see Section 16.9.16.5 Programming the SCCs in HDLC Mode for
information about HDLC mode programming.
Use the general SCCx mode high and low registers (GSMR_x) described in
Section 16.9.2 The General SCCx Mode Registers to program the HDLC bus controller
as follows:
1. Set the MODE field to HDLC mode in the GSMR_L.
2. Set the CTSS field to 1 and all other bits to zero or default in the GSMR_H.
3. Set the DIAG field to normal operation in the GSMR_L.
4. Set the RDCR and TDCR bits to 1x clock in the GSMR_L.
5. Set the TENC and RENC bits to NRZ in the GSMR_L.
6. Clear the RTSM bit in the GSMR_H.
7. Set the ENT and ENR bits in the GSMR_L.
Use the SCCx protocol-specific mode register described in Section 16.9.16.8 SCCx HDLC
Mode Register to program the HDLC bus controller as follows:
1. Set the NOF field as preferred.
2. Set the CRC field to 16-bit CRC CCITT.
3. Set the RTE bit.
4. Set the BUS bit.
5. Set the BRM bit to 1 or zero.
6. Set all other bits to zero or default.
16.9.17.3.1 HDLC Bus Controller Programming Example. Except for the previously
discussed GSMR_x and PSMR–SCC HDLC programming, use the example in
Section 16.9.16.14 SCC2 HDLC Programming Example #1.
16-264
MPC823e REFERENCE MANUAL
MOTOROLA
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