Motorola MPC823e Reference Manual page 1181

Microprocessor for mobile computing
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bcctr
Assembler Syntax
BIT
0
1
2
FIELD
19
BIT
16
17
18
FIELD
00000
Definition
Operation
Description
MOTOROLA
bcctr
BO,BI (LK = 0)
bcctrl
BO,BI (LK = 1)
3
4
5
6
7
19
20
21
22
23
Branch Conditional to Count Register
cond_ok ← BO[0] | (CR[BI] ≡ BO[1])
if cond_ok then
NIA ←
CTR || 0b00
iea
if LK then LR ←
CIA + 4
iea
The BI field specifies the bit in the condition register to be used
as the condition of the branch. The BO field is encoded as
described in the table below.
BO
0000 y
Decrement the count register (CTR), then branch if the condition is
FALSE.
0001 y
Decrement the CTR, then branch if the condition is FALSE.
001 zy
Branch if the condition is FALSE.
0100 y
Decrement the CTR, then branch if the condition is TRUE.
0101 y
Decrement the CTR, then branch if the condition is TRUE.
011 zy
Branch if the condition is TRUE.
Decrement the CTR, then branch if the decremented CTR ≠ 0
1 z 00 y
1 z 01 y
Decrement the CTR, then branch if the decremented CTR = 0
1 z 1 zz
Branch always.
NOTE: In this table, z indicates a bit that is ignored. The z bits must be cleared.
The y bit has a hint about whether a conditional branch is likely to be taken.
The branch target address is CTR || 0b00.
If LK = 1, the effective address of the instruction following the
branch instruction is placed into the link register.
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—bcctr
8
9
10
11
12
BO
24
25
26
27
28
528
DESCRIPTION
13
14
15
BI
29
30
31
LK
.
.
B-23

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