Motorola MPC823e Reference Manual page 396

Microprocessor for mobile computing
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Memory Controller
15.4.1.4 SRAM INTERFACE. Figure 15-17 illustrates a simple connection between an
SRAM device and the MPC823e.
MEMORY
15.4.1.5 EXTERNAL ASYNCHRONOUS MASTER SUPPORT. Figure 15-18 illustrates
the basic interface between an asynchronous external master and the GPCM to allow
connection to "static RAM" memory.
MPC823e
Figure 15-18. Asynchronous External Master Configuration For
15-38
CSx
WEx
GPL_x1 / OE
A[15:29]
D[0:31]
Figure 15-17. GPCM to SRAM Configuration
ASYNCHRONOUS EXTERNAL MASTER
TA
AS
TA
AS
ADDRESS
CSx
OE
WEx
DATA
GPCM-Handled Memory Devices
MPC823e REFERENCE MANUAL
32-BIT WIDE SRAM
CE
WEx
OE
ADDRESS
DATA
ADDRESS DATA
MEMORY
ADDRESS
CE
OE
W
DATA
128K
MOTOROLA

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