Table of Contents
Advertisement
ori
Assembler Syntax
BIT
0
1
2
FIELD
24
BIT
16
17
18
FIELD
Definition
Operation
Description
MOTOROLA
ori
rA,rS,UIMM
3
4
5
6
7
19
20
21
22
23
UIMM
OR Immediate
rA ← (rS) | ((16)0 || UIMM)
The contents of rS are ORed with 0x0000|| UIMM and the result
is placed into rA. The preferred no-op (an instruction that does
nothing) is ori 0,0,0.
Other registers altered:
None
Simplified mnemonics:
nop
equivalent to
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—ori
8
9
10
11
12
S
24
25
26
27
28
ori
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
0,0,0
FORM
D
B-113
Advertisement
Table of Contents
