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MPC823e Instruction Set—tlbie
tlbie
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
B-154
tlbie
rB
3
4
5
6
7
00000
19
20
21
22
23
Translation Lookaside Buffer Invalidate Entry
VPS ← rB[4-19]
Identify TLB entries corresponding to VPS
Each such TLB entry ← invalid
EA is the contents of rB. If the translation lookaside buffer (TLB)
contains an entry corresponding to EA, that entry is made invalid
(that is, removed from the TLB).
Multiprocessing implementations (for example, the 601, and
604) send a tlbie address-only broadcast over the address bus
to tell other processors to invalidate the same TLB entry in their
TLBs.
The TLB search is done regardless of the settings of MSR[IR]
and MSR[DR]. The search is done based on a portion of the
logical page number within a segment, without reference to the
segment registers. All entries matching the search criteria are
invalidated.
Block address translation for EA, if any, is ignored. This is a
supervisor-level instruction.
Other registers altered:
None
POWERPC ARCHITECTURE
LEVEL
OEA
MPC823e REFERENCE MANUAL
8
9
10
11
12
00000
24
25
26
27
28
30K6
SUPERVISOR
OPTIONAL
LEVEL
√
√
13
14
15
29
30
31
0
FORM
X
MOTOROLA
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