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Table 19-2. Video RAM Word Loaded with PAL Example
RAM
RAM WORD FIELD
ENTRY
Hx
Vx
Fx
Bx
0
00
00
00
00
1
11
00
00
00
2
11
00
00
00
3
11
00
00
00
4
00
00
00
00
5
11
00
00
00
6
11
00
00
11
7
11
00
00
11
8
11
00
00
00
9
00
00
00
00
10
11
00
00
00
11
11
00
00
00
12
11
00
00
00
13
00
00
11
00
14
11
00
11
00
15
11
00
11
00
16
11
00
11
00
17
00
00
11
00
18
11
00
11
00
19
11
00
11
11
20
11
00
11
11
21
11
00
11
00
22
00
00
11
00
23
11
00
11
00
24
11
00
11
00
25
11
00
11
00
NOTE: HX = HR:HF and VX = VR:VF.
MOTOROLA
VDS
INT
LCYC
LP
LST
01
0
22
1
0
Lines 1-22, FIELD = 0, BLANK is asserted (vertical
01
0
263
0
0
blanking)
01
0
1440
0
0
01
0
24
1
0
01
0
288
1
0
Entry 4: Beginning of loop(loop entries 4-8 288
times). Assert HSYNC and BLANK for 1 video clock.
01
0
255
0
0
Entry 5: Assert BLANK and negate HSYNC for 255
video clocks.
01
0
8
0
0
Entry 6: Negate BLANK for 8 video clocks. Display
video data from the VBCB.
00
0
1440
0
0
Entry 7: Display active video data from frame buffer
for 1440 video clocks (720 pixels).
01
0
24
1
0
Entry 8: Assert BLANK for 24 video clocks.
01
0
2
1
0
Lines 311-312, FIELD = 0, BLANK asserted
01
0
263
0
0
(vertical; blanking)
01
0
1440
0
0
01
0
24
1
0
01
0
23
1
0
Lines 313-335, FIELD = 1, BLANK asserted
01
0
263
0
0
(vertical; blanking)
01
0
1440
0
0
01
0
24
1
0
01
0
288
1
0
01
0
255
0
0
Lines 336-623. EVEN field active area
01
0
8
0
0
00
0
1440
0
0
01
0
24
1
0
01
0
2
1
0
Lines 624-625, FIELD = 1, BLANK is asserted
01
0
263
0
0
(vertical blanking)
01
0
1440
0
0
01
1
24
1
1
MPC823e REFERENCE MANUAL
Video Controller
LINE DESCRIPTION
19-27
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