Power Save Configuration Registers - Epson S1D13506 Technical Manual

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Look-Up Table Data Register
REG[1E4h]
LUT Data LUT Data
Bit 3 Bit 2
bits 7-4

8.3.14 Power Save Configuration Registers

Power Save Configuration Register
REG[1F0h]
n/a n/a
bit 4
bit 0
Power Save Status Register
REG[1F1h]
n/a n/a
bit 1
S1D13506
X25B-A-001-12
LUT Data LUT Data
Bit 1 Bit 0
LUT Data Bits [3:0]
This register is used to read/write the RGB Look-Up Tables. This register accesses the
entry at the pointer controlled by the Look-Up Table Address Register (REG[1E2h]).
Accesses to the Look-Up Table Data Register automatically increment the pointer.
Note
The RGB data is inserted into the LUT after the Blue data is written, i.e. all three colors
must be written before the LUT is updated.
n/a Reserved
Reserved.
This bit must be set to 0.
Power Save Mode Enable
When this bit = 1, the software initiated power save mode is enabled.
When this bit = 0, the software initiated power save mode is disabled.
n/a
LCD Power Save Status
This bit indicates the power save state of the LCD panel.
When this bit = 1, the panel is powered down.
When this bit = 0, the panel is powered up, or in transition of powering up or down.
Note
When this bit reads a 1, the system may safely shut down the LCD pixel clock source.
n/a
n/a
n/a n/a
Epson Research and Development
Vancouver Design Center
n/a n/a
n/a n/a
Mode Enable
LCD Power
n/a
Save Status
Hardware Functional Specification
Issue Date: 02/03/26
RW
n/a
RW
Power Save
RO
Memory
Controller
Power Save
Status