Epson S1D13506 Technical Manual page 401

Color lcd/crt/tv controller
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Epson Research and Development
Vancouver Design Center
13506CFG Configuration Program
Issue Date: 01/03/14
WE# Control
Refresh Time
Suspend Mode Refresh
CAS before RAS
Self refresh
No refresh
Installed Memory
Selects the WE# control used for the DRAM. DRAM
uses one of two methods of control when writing to
memory. These methods are referred to as 2-CAS# and
2-WE#.
The S5U13506 evaluation boards use DRAM requiring
the 2-CAS# method.
Selects the number of ms required to refresh 256 rows
of DRAM.
Selects the DRAM refresh method used during power
save mode.
The S5U13506 evaluation boards use DRAM requiring
CAS before RAS. For all other implementations, refer
to the manufacturer's specification for DRAM refresh
requirements.
This setting is selected for DRAM that requires timing
where the CAS signal occurs just before the RAS
signal.
This setting is selected for DRAM that requires no
signal from the S1D1306 to maintain memory refresh.
This setting does not refresh the memory during power
save mode. If this option is selected, the memory
contents are lost during power save.
Selects the amount of DRAM available for the display
buffer.
The S1D13506 evaluation board use 2M bytes of
DRAM.
Page 11
S1D13506
X25B-B-001-02

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