Page 70
7.3 Memory Interface Timing
7.3.1 EDO-DRAM Read, Write, Read-Write Timing
Memory
Clock
RAS#
CAS#
MA
WE# (read)
MD (read)
WE#(write)
MD(write)
Memory
Clock
RAS#
CAS#
MA
WE#
MD(Read)
MD(Write)
S1D13506
X25B-A-001-12
t1
t3
t4
t8
t9
t10
R
t12
Figure 7-12: EDO-DRAM Page Mode Timing
t1
t5
t6
t3
t4
t8
t10 t11
t9
R
C1
C2
t12
t15
t14
d1
Figure 7-13: EDO-DRAM Read-Write Timing
t2
t5
t6
t1
t11 t10 t11
C1
C2
C3
t14
t15
d1
d2
t19
t18
t20 t21
t22
d1
d2
d3
t1
C3
C1
t23
t24
t25
t26
d2
d3
Epson Research and Development
Vancouver Design Center
t7
t13
t17
t16
d3
C2
C3
t19
t20 t21
t22
d1
d2
d3
Hardware Functional Specification
Issue Date: 02/03/26
t7