Table 8-23: Crt/Tv Bit-Per-Pixel Selection; Crt/Tv Display Mode Registers - Epson S1D13506 Technical Manual

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8.3.9 CRT/TV Display Mode Registers

CRT/TV Display Mode Register
REG[060h]
CRT/TV
n/a
Display Blank
bit 7
bits 2-0
Bit-per-pixel Select Bits [2:0]
S1D13506
X25B-A-001-12
n/a
CRT/TV Display Blank
When this bit = 1 the CRT/TV display pipeline is disabled and all CRT/TV data outputs
are forced to zero (i.e., the screen is blanked).
When this bit = 0 the CRT/TV display pipeline is enabled.
CRT/TV Bit-per-pixel Select Bits [2:0]
These bits select the bit-per-pixel for the displayed data.
Note
15/16 bpp color depths bypass the LUT.

Table 8-23: CRT/TV Bit-per-pixel Selection

000
001
010
011
100
101
110-111
n/a n/a
Color Depth (bpp)
Epson Research and Development
Vancouver Design Center
CRT/TV Bit- CRT/TV Bit-
per-pixel per-pixel
Select Bit 2 Select Bit 1
Reserved
Reserved
4 bpp
8 bpp
15 bpp
16 bpp
Reserved
Hardware Functional Specification
RW
CRT/TV Bit-
per-pixel
Select Bit 0
Issue Date: 02/03/26