Bitblt Descriptions - Epson S1D13506 Technical Manual

Color lcd/crt/tv controller
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10.2 BitBLT Descriptions

S1D13506
X25B-G-003-04
The S1D13506 supports 13 fundamental BitBLT operations:
• Write Blit with ROP.
• Read Blit.
• Move Blit in positive direction with ROP.
• Move Blit in negative direction with ROP.
• Transparent Write Blit.
• Transparent Move Blit in positive direction.
• Pattern Fill with ROP.
• Pattern Fill with Transparency.
• Color Expansion.
• Color Expansion with Transparency.
• Move Blit with Color Expansion.
• Move Blit with Color Expansion and Transparency.
• Solid Fill.
Most of the 13 operations are self completing. This means once they begin they complete
on their own, not requiring data transfers with the CPU. The remaining five BitBLT opera-
tions (Write Blit with ROP, Transparent Write Blit, Color Expansion, Color Expansion
with Transparency, Read Blit) require data to be written/read to/from the display buffer.
This data must be transferred one word (16-bits) at a time. This does not imply only 16-bit
CPU instructions are acceptable. If a system is able to separate one DWORD write into two
WORD writes, then 32-bit CPU instructions are acceptable. Otherwise, two back to back
16-bit CPU instructions are required.
The data is not directly written/read to/from the display buffer. It is written/read to/from the
BitBLT FIFO through the 1M blit aperture specified at the address of REG[100000h]. The
16 word FIFO can be written to only when not full and can be read from only when not
empty. Failing to monitor the FIFO status can result in a BitBLT FIFO overflow or
underflow.
While the FIFO is being written to by the CPU, it is also being emptied by the S1D13506.
If the S1D13506 empties the FIFO faster than the CPU can fill it, it may not be possible to
cause an overflow/underflow. In these cases, performance can be improved by not
monitoring the FIFO status. However, this is very much platform dependent and must be
determined for each system.
Note
When TV with flicker filter is enabled or simultaneous display is active, always test the
FIFO status before reading from/writing to the FIFO.
Epson Research and Development
Vancouver Design Center
Programming Notes and Examples
Issue Date: 02/03/21

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