Table 7-14: Edo-Dram Read, Write, Read-Write Timing - Epson S1D13506 Technical Manual

Epson Research and Development
Vancouver Design Center
Symbol
t1 Memory clock period
Random read or write cycle time (REG[02Bh] bits 1-0 = 00)
t2 Random read or write cycle time (REG[02Bh] bits 1-0 = 01)
Random read or write cycle time (REG[02Bh] bits 1-0 = 10)
RAS# precharge time (REG[02Ah] bits 1-0 = 00)
t3 RAS# precharge time (REG[02Ah] bits 1-0 = 01)
RAS# precharge time (REG[02Ah] bits 1-0 = 10)
RAS# to CAS# delay time (REG[02Ah] bit 4 = 0 and bits 1-0
= 00 or 10)
t4 RAS# to CAS# delay time (REG[02Ah] bit 4 = 1 and bits 1-0
= 00 or 10)
RAS# to CAS# delay time (REG[02Ah] bits 1-0 = 01)
t5 CAS# precharge time
t6 CAS# pulse width
t7 RAS# hold time
Row address setup time (REG[02Ah] bits 1-0 = 00
t8 Row address setup time (REG[02Ah] bits 1-0 = 01)
Row address setup time (REG[02Ah] bits 1-0 = 10)
Row address hold time (REG[02Ah] bits 1-0 = 00 or 10)
t9
Row address hold time (REG[02Ah] bits 1-0 = 01)
t10 Column address setup time
t11 Column address hold time
Read Command setup (REG[02Ah] bit 4 = 0 and bits 1-0 =
00)
t12 Read Command setup (REG[02Ah] bit 4 = 1 and bits 1-0 =
10)
Read Command setup (all other REG[02Ah] values)
Read Command hold (REG[02Ah] bit 4 = 0 and bits 1-0 = 00)
t13 Read Command hold (REG[02Ah] bit 4 = 1 and bits 1-0 = 10)
Read Command hold (all other REG[02Ah] values)
t14 Read data setup referenced from CAS#
t15 Read data hold referenced from CAS#
t16 Last read data setup referenced from RAS#
t17 Bus turn-off from RAS#
t18 Write command setup time
t19 Write command hold time
t20 Write Data setup time
t21 Write Data hold time
t22 MD tri-state
t23 CAS# to WE# active during read-write cycle
t24 Write command setup during read-write cycle
Last read data setup referenced from WE# during read-write
t25
cycle
t26 Bus tri-state from WE# during read-write cycle
Hardware Functional Specification
Issue Date: 02/03/26

Table 7-14: EDO-DRAM Read, Write, Read-Write Timing

Parameter Min Max
25
5 t1
4 t1
3 t1
2 t1
1.45 t1
t1
2 t1 - 3 2 t1
t1 - 3 t1
1.45 t1 - 3 1.55 t1
0.45 t1
0.45 t1 - 1
t1
2.45 t1 - 3
2 t1 - 3
1.45 t1 - 3
0.45 t1 - 1
t1 - 3
0.45 t1 - 3
0.45 t1 - 1
4.45 t1 - 1
2.45 t1 - 1
3.45 t1 - 1
3.45 t1 - 1
1.45 t1 - 1
2.45 t1 - 1
4
2
3
2
0.45 t1 - 1
0.45 t1 - 1
0.45 t1 - 4
0.45 t1
0.45 t1 0.55 t1 + 19
t1
1.45 t1 - 1
18
0 t1 - 6
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S1D13506
X25B-A-001-12