Epson S1D13506 Technical Manual page 152

Color lcd/crt/tv controller
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Page 146
CRT/TV HRTC Start Position Register
REG[053h]
n/a
n/a
bits 5-0
CRT HRTC Pulse Width Register
REG[054h]
CRT HRTC
Polarity
n/a
Select
bit 7
bits 3-0
S1D13506
X25B-A-001-12
CRT/TV
CRT/TV
HRTC Start
HRTC Start
Position Bit 5
Position Bit 4
CRT/TV HRTC Start Position Bits [5:0]
For CRT/TV, these bits specify the delay, in 8 pixel resolution, from the start of the hori-
zontal non-display period to the leading edge of the HRTC pulse.
The following equations can be used to determine the HRTC start position in number of
pixels for each display type:
HRTC start position in number of pixels=:
[(ContentsOfThisRegister)
[(ContentsOfThisRegister)
[((ContentsOfThisRegister) + 1)
[((ContentsOfThisRegister) + 1)
[((ContentsOfThisRegister) + 1)
[((ContentsOfThisRegister) + 1)
Note
REG[052h] + 1 ≥ (REG[053h] + 1) + (REG[054h] bits 3-0 + 1)
n/a
CRT HRTC Polarity Select
This bit selects the polarity of HRTC for CRTs.
When this bit = 1, the HRTC pulse is active high.
When this bit = 0, the HRTC pulse is active low.
Note
For NTSC/PAL modes, this bit must be set to 0b.
CRT HRTC Pulse Width Bits [3:0]
These bits specify the pulse width of the CRT HRTC output signal in 8 pixel resolution.
HRTC pulse width in number of pixels = ((ContentsOfThisRegister) + 1) × 8
Note
For NTSC/PAL modes, these bits must be set to 0000b.
Note
REG[052h] + 1 ≥ (REG[053h] + 1) + (REG[054h] bits 3-0 + 1)
CRT/TV
HRTC Start
Position Bit 3
Position Bit 2
x
8 + 3] for CRT with 4/8 bpp color depth
x
8 + 5] for CRT in 15/16 bpp color depth
8 - 7] for TV-NTSC in 4/8 bpp color depth
x
x
8 - 5] for TV-NTSC in 15/16 bpp color depth
8 - 7] for TV-PAL in 4/8 bpp color depth
x
8 - 5] for TV-PAL in 15/16 bpp color depth
x
CRT HRTC
n/a
Pulse Width
Bit 3
Epson Research and Development
Vancouver Design Center
CRT/TV
CRT/TV
HRTC Start
HRTC Start
Position Bit 1
CRT HRTC
CRT HRTC
Pulse Width
Pulse Width
Bit 2
Bit 1
Hardware Functional Specification
RW
CRT/TV
HRTC Start
Position Bit 0
RW
CRT HRTC
Pulse Width
Bit 0
Issue Date: 02/03/26

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