Table 5-9: Lcd Interface Pin Mapping - Epson S1D13506 Technical Manual

Color lcd/crt/tv controller
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Page 42
Monochrome Passive
Panel
S1D13506
Pin
Single
Names
4-bit
8-bit
FPFRAME
FPLINE
FPSHIFT
DRDY
FPDAT0
driven 0
D0
FPDAT1
driven 0
D1
FPDAT2
driven 0
D2
FPDAT3
driven 0
D3
FPDAT4
D0
D4
FPDAT5
D1
D5
FPDAT6
D2
D6
FPDAT7
D3
D7
FPDAT8
driven 0 driven 0 driven 0 driven 0 driven 0 driven 0
FPDAT9
driven 0 driven 0 driven 0 driven 0 driven 0 driven 0
FPDAT10 driven 0 driven 0 driven 0 driven 0 driven 0 driven 0
FPDAT11 driven 0 driven 0 driven 0 driven 0 driven 0 driven 0
FPDAT12 driven 0 driven 0 driven 0 driven 0 driven 0 driven 0
FPDAT13 driven 0 driven 0 driven 0 driven 0 driven 0 driven 0
FPDAT14 driven 0 driven 0 driven 0 driven 0 driven 0 driven 0
FPDAT15 driven 0 driven 0 driven 0 driven 0 driven 0 driven 0
S1D13506
X25B-A-001-12

Table 5-9: LCD Interface Pin Mapping

Single
Dual
Single
Format 1
8-bit
4-bit
MOD
FPSHIFT2
LD0
driven 0
LD1
driven 0
LD2
driven 0
LD3
driven 0
UD0
D0
UD1
D1
UD2
D2
UD3
D3
Note
DRDY and FPDAT[15:8] may be used by the MediaPlug interface when the MediaPlug
is enabled. For MediaPlug Interface pin mapping, see Table 5-11:.
Note
For FPDATxx to LCD interface hardware connections, refer to Section 7.5, "Display In-
terface" on page 81.
Color Passive Panel
Single
Single
Format 2
8-bit
8-bit
16-Bit
FPFRAME
FPLINE
FPSHIFT
MOD
D0
D0
D0
D1
D1
D1
D2
D2
D2
D3
D3
D3
D4
D4
D8
D5
D5
D9
D6
D6
D10
D7
D7
D11
D4
D5
D6
D7
D12
D13
D14
D15
Epson Research and Development
Vancouver Design Center
Color TFT/D-TFD Panel
Dual
8-bit
16-bit
9-bit
LD0
LD0
R2
LD1
LD1
R1
LD2
LD2
R0
LD3
LD3
G2
UD0
UD0
G1
UD1
UD1
G0
UD2
UD2
B2
UD3
UD3
B1
driven 0
LD4
B0
driven 0
LD5
driven 0
driven 0
LD6
driven 0 driven 0
driven 0
LD7
driven 0
driven 0
UD4
driven 0 driven 0
driven 0
UD5
driven 0 driven 0
driven 0
UD6
driven 0
driven 0
UD7
driven 0 driven 0
Hardware Functional Specification
12-bit
18-bit
DRDY
R3
R5
R2
R4
R1
R3
G3
G5
G2
G4
G1
G3
B3
B5
B2
B4
B1
B3
R0
R2
R1
G0
G2
G1
G0
B0
B2
B1
Issue Date: 02/03/26

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