Table 8-27: Crt/Tv Ink/Cursor Selection - Epson S1D13506 Technical Manual

Epson Research and Development
Vancouver Design Center
LCD Ink/Cursor FIFO High Threshold Register
REG[07Eh]
n/a n/a
bits 5-0
8.3.11 CRT/TV Ink/Cursor Registers
CRT/TV Ink/Cursor Control Register
REG[080h]
n/a n/a
bits 1-0
CRT/TV Ink/Cursor Bits [1:0]
Note
Hardware Functional Specification
Issue Date: 02/03/26
n/a n/a
LCD Ink/ FIFO High Threshold Bits [3:0]
Cursor
These bits are used to optimize the display memory request arbitration for the Hardware
Cursor/Ink Layer. When this register is set to 00h, the threshold is automatically set in
hardware.
n/a n/a
CRT/TV Ink/Cursor Control Bits [1:0]
These bits enable the CRT/TV Ink/Cursor circuitry.

Table 8-27: CRT/TV Ink/Cursor Selection

00
01
10
11
During Ink mode, the Cursor X & Y Position registers must be programmed to zero.
LCD LCD
Ink/Cursor Ink/Cursor
FIFO High FIFO High
Threshold Threshold
Bit 3 Bit 2
n/a n/a
Mode
Inactive
Cursor
Ink
Reserved
Page 157
RW
LCD LCD
Ink/Cursor Ink/Cursor
FIFO High FIFO High
Threshold Threshold
Bit 1 Bit 0
RW
CRT/TV CRT/TV
Ink/Cursor Ink/Cursor
Mode Mode
Bit 1 Bit 0
S1D13506
X25B-A-001-12