D Bitblt Engine; Functional Description; Bitblt Operations - Epson S1D13506 Technical Manual

Color lcd/crt/tv controller
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9 2D BitBLT Engine

9.1 Functional Description

9.2 BitBLT Operations

Write BitBLT
Move BitBLT
Read BitBLT
Solid Fill
S1D13506
X25B-A-001-12
The S1D13506 has a built-in 2D BitBLT engine which increases the performance of Bit
Block Transfers (BitBLT). This section will discuss the BitBLT engine design and
functionality.
The 2D BitBLT engine is designed using a 16-bit architecture. It implements a 16-bit data
bus and supports both 8 and 16 bit-per-pixel color depths.
The BitBLT engine supports rectangular and linear addressing modes for source and desti-
nation in a positive direction for all BitBLT operations except the move BitBLT which also
supports in negative direction.
The BitBLT operations support byte alignment of all types. The BitBLT engine has a
dedicated BitBLT IO access space allowing it to support multi-tasking applications. This
allows the BitBLT engine to support simultaneous BitBLT and CPU read/write operations.
Note
For details on the operation of the BitBLT registers, see Section 8.3.12, "BitBLT Con-
figuration Registers" on page 161.
The Write BitBLT provides 16, two operand, ROP functions.
The Move BitBLT provides 16, two operand, ROP functions and is supported in both a
positive and negative direction.
The Read BitBLT supports bit block transfers from the display buffer to the host. No ROP
function is applied.
The Solid Fill BitBLT fills a specified BitBLT area with a solid color as defined in the
Foreground Color Register. In 8 bpp mode, only the low byte of the Foreground Color is
used for solid fill.
Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 02/03/26

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