Limitations - Epson S1D13506 Technical Manual

Color lcd/crt/tv controller
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Page 58
REG[042h] LCD Display Start Address Register 0
Bit 7
Bit 6
REG[043h] LCD Display Start Address Register 1
Bit 15
Bit 14
REG[044h] LCD Display Start Address Register 2
n/a
n/a
SwivelView Enable
Bit 1
Bit 0
0
0
0
1
1
0
1
1

9.3 Limitations

S1D13506
X25B-G-003-04
Bit 5
Bit 4
Bit 13
Bit 12
n/a
n/a
The LCD Display Start Address Registers must be adjusted according to the desired
SwivelView rotation and color depth. Set the LCD Display Start Address Registers based
on the values provided for each color depth in the following table. Panel Width (PW) is the
horizontal panel size in pixels. Panel Height (PH) is the vertical panel size in lines (i.e. for
a 640x480 panel, PW is 640 and PH is 480 regardless of display rotation). Stride is the
based on the previously calculated memory offset in bytes (Stride = MemoryOffset × 2).
Table 9-3: LCD Display Start Address Values
Display Rotated
0 degrees
90 degrees
180 degrees
(Stride
270 degrees
The following limitations apply when SwivelView bit 0 is set to 1 (rotation by 90° or 270°):
• Only 8/15/16 bpp modes can be rotated 90 or 270 degrees.
• Hardware Cursor and Ink Layer images are not rotated - software rotation must be used.
SwivelView must be turned off when the programmer is accessing the Hardware Cursor
or the Ink Layer. The blit engine ignores the SwivelView bits also.
• Pixel panning works vertically.
• It is not possible to rotate an already displayed image. The image must be redrawn.
Note
Drawing into the Hardware Cursor/Ink Layer with SwivelView enabled requires dis-
abling SwivelView, drawing in the Hardware Cursor/Ink Layer buffer, then re-enabling
SwivelView.
Bit 3
Bit 2
Bit 11
Bit 10
Bit 19
Bit 18
LCD Display Start Address Value
15/16 Bpp mode
0
(1024 - PW)
×
×
÷
PH - (Stride - 2
PW))
×
÷
(Stride
PH)
2 - 1
Epson Research and Development
Vancouver Design Center
Bit 1
Bit 9
Bit 17
8 Bpp mode
0
(1024 - PW)
×
2 - 1
(Stride
PH - (Stride - PW))
×
(Stride
PH)
Programming Notes and Examples
Issue Date: 02/03/21
Bit 0
Bit 8
Bit 16
÷
2
÷
2 - 1
÷
2 - 1

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