Epson S1D13506 Technical Manual page 577

Epson Research and Development
Vancouver Design Center
1 S1D13506 Power Consumption
Power Consumption
Issue Date: 01/02/08
S1D13506 power consumption is affected by many system design variables.
• Input clock frequency (CLKI/CLKI2): the CLKI/CLKI2 frequency determines the
LCD/CRT frame-rate, CPU performance to memory, and other functions – the higher
the input clock frequency, the higher the frame-rate, performance and power
consumption.
• CPU interface: the S1D13506 current consumption depends on the BUSCLK frequency,
data width, number of toggling pins, and other factors – the higher the BUSCLK, the
higher the CPU performance and power consumption.
• V voltage level: the voltage level affects power consumption – the higher the voltage,
DD
the higher the consumption.
• Display mode: the resolution and color depth affect power consumption – the higher the
resolution/color depth, the higher the consumption.
• Internal CLK divide: internal registers allow the input clock to be divided before going
to the internal logic blocks – the higher the divide, the lower the power consumption.
There is a power save mode in the S1D13506. The power consumption is affected by
various system design variables.
• DRAM refresh mode (CBR or self-refresh): self-refresh capable DRAM allows the
S1D13506 to disable the internal memory clock thereby saving power.
• Clock states during the power save mode: disabling the clocks during power save mode
has substantial power savings.
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S1D13506
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