Usage Notes - Hitachi H8/3006 Hardware Manual

14.4

Usage Notes

The following points should be noted when using the SCI as a smart card interface.
Receive Data Sampling Timing and Receive Margin in Smart Card Interface Mode: In smart
card interface mode, the SCI operates on a base clock with a frequency of 372 times the transfer
rate. In reception, the SCI synchronizes internally with the fall of the start bit, which it samples on
the base clock. Receive data is latched at the rising edge of the 186th base clock pulse. The timing
is shown in figure 14.11.
186 clocks
0
Internal base
clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
Figure 14.11 Receive Data Sampling Timing in Smart Card Interface Mode
The receive margin can therefore be expressed as follows.
Receive margin in smart card interface mode:
M = (0.5 –
M: Receive margin (%)
N: Ratio of clock frequency to bit rate (N = 372)
D: Clock duty cycle (L = 0 to 1.0)
L: Frame length (L =10)
F: Absolute deviation of clock frequency
512
372 clocks
185 371
Start bit
1
) – (L – 0.5) F –
2N
0
D0
D – 0.5
(1 + F) × 100%
N
371 0
185
D1