20.3.8
DMAC Timing
DMAC timing is shown as follows.
• DMAC TEND output timing for 2 state access
Figure 20.22 shows the DMAC TEND output timing for 2 state access.
• DMAC TEND output timing for 3 state access
Figure 20.23 shows the DMAC TEND output timing for 3 state access.
• DMAC DREQ input timing
Figure 20.24 shows DMAC DREQ input timing.
φ
TEND
Figure 20.22 DMAC TEND Output Timing for 2 State Access
φ
t
TED1
TEND
Figure 20.23 DMAC TEND Output Timing for 3 State Access
608
T
1
t
TED1
T
1
φ
t
DREQ
Figure 20.24 DMAC DREQ Input Timing
T
2
T
2
t
DRQS
DRQH
t
TED2
T
3
t
TED2