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8.6.2
Register Configuration
Table 8.9 summarizes the registers of port 9.
Table 8.9
Port 9 Registers
Address*
Name
H'EE008
Port 9 data direction register
H'FFFD8
Port 9 data register
Note:
*
Lower 20 bits of the address in advanced mode.
Port 9 Data Direction Register (P9DDR): P9DDR is an 8-bit write-only register that can select
input or output for each pin in port 9.
Bits 7 and 6 are reserved. They cannot be modified and always read as 1.
Bit
—
Initial value
Read/Write
—
Reserved bits
When a pin in port 9 becomes an output port if the corresponding P9DDR bit is set to 1, and an
input port if this bit is cleared to 0.
P9DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P9DDR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. When transition is made to software standby mode while a P9DDR
bit is set to 1, the corresponding pin maintains its output state.
258
7
6
5
—
P9 DDR
5
1
1
0
—
W
Abbreviation
R/W
P9DDR
W
P9DR
R/W
4
3
P9 DDR
P9 DDR
P9 DDR
4
3
0
0
W
W
Port 9 data direction 5 to 0
These bits select input or
output for port 9 pins
Initial Value
H'C0
H'C0
2
1
0
P9 DDR
P9 DDR
2
1
0
0
0
0
W
W
W
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