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10.4
Operation
10.4.1
8TCNT Count Timing
8TCNT is incremented by input clock pulses (either internal or external).
Internal Clock: Three different internal clock signals (φ/8, φ/64, or φ/8192) divided from the
system clock (φ) can be selected by setting bits CKS2 to CKS0 in 8TCR. Figure 10.8 shows the
count timing.
φ
Internal clock
TCNT input clock
8TCNT
Note: Even when the same internal clock is selected for both the 16- and 8-bit timers,
they do not operate in the same manner because the count-up edge differs.
External Clock: Three incrementation methods can be selected by setting bits CKS2 to CKS0 in
8TCR: on the rising edge, the falling edge, and both rising and falling edges.
The pulse width of the external clock signal must be at least 1.5 serial clocks when a single edge
is selected, and at least 2.5 system clocks when both edges are selected. Shorter pulses will not be
counted correctly.
Figure 10.9 shows the timing for incrementation on both edges of the external clock signal.
N–1
Figure 10.8 Count Timing for Internal Clock Input
N
N+1
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