Hitachi H8/3006 Hardware Manual page 671

ABWCR—Bus Width Control Register
Modes 1, 3 Initial value
Modes 2, 4 Initial value
Read/Write
ASTCR—Access State Control Register
Bit
Initial value
Read/Write
658
7 6
Bit
ABW7 ABW6
1 1
0 0
R/W R/W
Area 7 to 0 bus width control
Bits 7 to 0
ABW7
to ABW0
0
1
7 6 5
AST7 AST6 AST5
1 1 1
R/W R/W R/W
Area 7 to 0 access state control
Bits 7 to 0
AST7
to AST0
Areas 7 to 0 are two-state access areas
0
Areas 7 to 0 are three-state access areas
1
H'EE020
5 4 3
ABW5 ABW4 ABW3
1 1 1
0 0 0
R/W R/W R/W
Bus Width of Access Area
Areas 7 to 0 are 16-bit access areas
Areas 7 to 0 are 8-bit access areas
H'EE021
4 3
AST4 AST3 AST2
1 1
R/W R/W R/W
Number of States in Access Area
Bus controller
2 1 0
ABW2 ABW1 ABW0
1 1 1
0 0 0
R/W R/W R/W
Bus controller
2 1 0
AST1 AST0
1 1 1
R/W R/W