Hitachi H8/3006 Hardware Manual page 18

Section 18 Clock Pulse Generator
18.1 Overview............................................................................................................................ 549
18.1.1 Block Diagram...................................................................................................... 549
18.2 Oscillator Circuit................................................................................................................ 550
18.2.1 Connecting a Crystal Resonator............................................................................ 550
18.2.2 External Clock Input ............................................................................................. 552
18.3 Duty Adjustment Circuit.................................................................................................... 555
18.4 Prescalers ........................................................................................................................... 555
18.5 Frequency Divider.............................................................................................................. 555
18.5.1 Register Configuration.......................................................................................... 555
18.5.2 Division Control Register (DIVCR) ..................................................................... 555
18.5.3 Usage Notes .......................................................................................................... 556
Section 19 Power-Down State
19.1 Overview............................................................................................................................ 557
19.2 Register Configuration ....................................................................................................... 559
19.2.1 System Control Register (SYSCR)....................................................................... 559
19.2.2 Module Standby Control RegisterH (MSTCRH) ................................................. 561
19.2.3 Module Standby Control Register L (MSTCRL) ................................................. 562
19.3 Sleep Mode ........................................................................................................................ 564
19.3.1 Transition to Sleep Mode...................................................................................... 564
19.3.2 Exit from Sleep Mode........................................................................................... 564
19.4 Software Standby Mode..................................................................................................... 565
19.4.1 Transition to Software Standby Mode.................................................................. 565
19.4.2 Exit from Software Standby Mode ....................................................................... 565
19.4.3 Selection of Waiting Time for Exit from Software Standby Mode...................... 566
19.4.4 Sample Application of Software Standby Mode .................................................. 567
19.4.5 Note....................................................................................................................... 567
19.5 Hardware Standby Mode ................................................................................................... 568
19.5.1 Transition to Hardware Standby Mode................................................................. 568
19.5.2 Exit from Hardware Standby Mode...................................................................... 568
19.5.3 Timing for Hardware Standby Mode.................................................................... 568
19.6 Module Standby Function.................................................................................................. 569
19.6.1 Module Standby Timing ....................................................................................... 569
19.6.2 Read/Write in Module Standby ............................................................................ 569
19.6.3 Usage Notes .......................................................................................................... 569
19.7 System Clock Output Disabling Function ......................................................................... 570
Section 20 Electrical Characteristics
20.1 Absolute Maximum Ratings .............................................................................................. 571
20.2 Electrical Characteristics.................................................................................................... 572
20.2.1 DC Characteristics ................................................................................................ 572
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