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5.1.2
Block Diagram
Figure 5-1 shows a block diagram of the interrupt controller.
NMI
input
IRQ input
OVF
TME
.
.
.
.
.
.
.
.
.
.
TEI
TEIE
Legend
ISCR:
IRQ sense control register
IER:
IRQ enable register
ISR:
IRQ status register
IPRA:
Interrupt priority register A
IPRB:
Interrupt priority register B
SYSCR:
System control register
78
ISCR
IER
IRQ input
section ISR
Interrupt controller
Figure 5-1 Interrupt Controller Block Diagram
IPRA, IPRB
Interrupt
request
Priority
decision logic
Vector
number
SYSCR
CPU
I
CCR
UI
UE
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