Figure 9.11 Connection Example With 32-Bit Paged Rom (Asynchronous Sram Memc); Figure 9.12 Connection Example With 16-Bit Paged Rom (Asynchronous Sram Memc) - Renesas R-IN32M4-CL3 User Manual

R-IN32M4-CL3 User's Manual: Board design edition
9.2.1.2 Connection Example with Paged ROM
The following figure shows an example when this LSI chip is connected to paged ROM.
R-IN32M4-CL3

Figure 9.11 Connection Example with 32-Bit Paged ROM (Asynchronous SRAM MEMC)

R-IN32M4-CL3

Figure 9.12 Connection Example with 16-Bit Paged ROM (Asynchronous SRAM MEMC)

Caution: The on-page mode of paged ROM can only be used when CSZ0 is connected.
R18UZ0074EJ0100
Dec 24, 2019
A2-A21
D16-D31
CSZ0
RDZ
WRSTBZ
D0-D15
A1-A20
D0-D15
CSZ0
RDZ
WRSTBZ
9. External MCU/Memory Interface Pins
A0-A19
O0-O15
Paged ROM
/CE
(1 Mword × 16 bits)
/OE
/WE
A0-A19
O0-O15
Paged ROM
/CE
(1 Mword × 16 bits)
/OE
/WE
A0-A19
O0-O15
Paged ROM
（1Mword×16bit）
/CE
/OE
/WE
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