Xilinx SelectIO 7 Series User Manual page 70

Fpgas
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Chapter 1:
SelectIO Resources
Figure 1-53
HSTL class-II (1.5V or 1.8V) with bidirectional termination. In a specific circuit, all drivers
and receivers must be at the same voltage level (either 1.5V or 1.8V); they are not
interchangeable.
X-Ref Target - Figure 1-53
External Termination
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
+
Figure 1-53: Differential HSTL Class II (1.5V or 1.8V) Bidirectional Termination
70
Send Feedback
shows a sample circuit illustrating a termination technique for differential
V
=
TT
0.75V for DIFF_HSTL_II
IOB
0.9V for DIFF_HSTL_II_18
50Ω
V
=
TT
0.75V for DIFF_HSTL_II
0.9V for DIFF_HSTL_II_18
50Ω
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V
=
TT
0.75V for DIFF_HSTL_II
0.9V for DIFF_HSTL_II_18
50Ω
Z 0
V
=
TT
0.75V for DIFF_HSTL_II
0.9V for DIFF_HSTL_II_18
50ϖ
Z 0
7 Series FPGAs SelectIO Resources User Guide
IOB
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
DIFF_HSTL_II
DIFF_HSTL_II_18
+
ug471_c1_43_011811
UG471 (v1.10) May 8, 2018

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