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The IOBUF_INTERMDISABLE primitive can disable the input buffer and force the O
output to the fabric to a logic High when the USE_IBUFDISABLE attribute is set to TRUE
and the IBUFDISABLE signal is asserted High. If USE_IBUFDISABLE is set to FALSE, this
input is ignored and should be tied to ground. If the I/O is using the optional uncalibrated
split-termination feature (IN_TERM), those termination legs are disabled whenever the
driver is active (T is low). This primitive further allows the termination legs to be disabled
whenever the INTERMDISABLE signal is asserted High. These features can be combined
to reduce power whenever the input is idle for a period of time.
IOBUFDS
Figure 1-27
disables the output buffer.
X-Ref Target - Figure 1-27
IOBUFDS_DCIEN
The IOBUFDS_DCIEN primitive shown in
has a IBUFDISABLE port that can be used to disable the input buffer during periods that
the buffer is not being used. The IOBUFDS_DCIEN primitive also has a
DCITERMDISABLE port that can be used to manually disable the optional DCI
split-termination feature. See
VCCO/2)
7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
shows the differential input/output buffer primitive. A logic High on the T pin
T
3-state Input
I (Input)
from FPGA
O (Output)
to FPGA
Figure 1-27: Differential Input/Output Buffer Primitive (IOBUFDS)
Split-Termination DCI (Thevenin Equivalent Termination to
and
DCI and 3-state DCI (T_DCI)
www.xilinx.com
7 Series FPGA SelectIO Primitives
IOBUFDS
+
IO
–
IOB
+
–
ug471_c1_24_041112
Figure 1-28
is available in the HP I/O banks. It
for more details.
I/O
to/from
device pad
41
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