Xilinx SelectIO 7 Series User Manual page 102

Chapter 1: SelectIO Resources
Table 1-56: DRIVE and SLEW Attributes, Bidirectional Buffers, and DCI Termination Type (Cont'd)
I/O Standard
HSLVDCI_15
HSLVDCI_18
HSTL_I
HSTL_I_12
HSTL_I_18
HSTL_I_DCI
HSTL_I_DCI_18
HSTL_II
HSTL_II_18
HSTL_II_DCI
HSTL_II_DCI_18
HSTL_II_T_DCI
HSTL_II_T_DCI_18
HSUL_12
HSUL_12_DCI
LVCMOS12
LVCMOS15
LVCMOS18
LVCMOS25
LVCMOS33
LVDCI_15
LVDCI_18
LVDCI_DV2_15
LVDCI_DV2_18
LVDS
LVDS_25
SSTL12
SSTL12_DCI
SSTL12_T_DCI
LVTTL
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DRIVE (mA)
I/O Bank
Availability
Outputs
HP N/A
HP N/A
Both N/A
HP N/A
Both N/A
HP N/A
HP N/A
Both N/A
Both N/A
HP N/A
HP N/A
HP N/A
HP N/A
Both N/A
HP N/A
HP: 2, 4, 6, 8
Both
HR: 4, 8, 12
HP: 2, 4, 6, 8, 12, 16
Both
HR: 4, 8, 12, 16
HP: 2, 4, 6, 8, 12, 16
Both
HR: 4, 8, 12, 16, 24
HR 4, 8, 12, 16
HR 4, 8, 12, 16
HP N/A
HP N/A
HP N/A
HP N/A
HP N/A
HR N/A
HP N/A
HP N/A
HP N/A
HR 4, 8, 12, 16, 24
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SLEW
Bidirectional
(1)
Buffers
Outputs
N/A Yes
N/A Yes
SLOW, FAST No
SLOW, FAST No
SLOW, FAST No
SLOW, FAST No
SLOW, FAST No
SLOW, FAST Yes
SLOW, FAST Yes
SLOW, FAST Yes
SLOW, FAST Yes
SLOW, FAST Required
SLOW, FAST Required
SLOW, FAST Yes
SLOW, FAST Yes
SLOW, FAST Yes
SLOW, FAST Yes
SLOW, FAST Yes
SLOW, FAST Yes
SLOW, FAST Yes
N/A Yes
N/A Yes
N/A Yes
N/A Yes
N/A Yes
(3)
N/A Yes
SLOW, FAST Yes
SLOW, FAST No
SLOW, FAST Required
SLOW, FAST Yes
7 Series FPGAs SelectIO Resources User Guide
(2)
DCI Type
Outputs Inputs
Driver None
Driver None
None None
None None
None None
None Split
None Split
None None
None None
Split Split
Split Split
None Split
None Split
None None
Driver None
None None
None None
None None
None None
None None
Driver None
Driver None
Driver None
Driver None
None None
None None
None None
None Split
None Split
None None
UG471 (v1.10) May 8, 2018