Chapter 1: Selectio Resources; I/O Tile Overview - Xilinx SelectIO 7 Series User Manual

SelectIO Resources

I/O Tile Overview

Input/output characteristics and logic resources are covered in three consecutive chapters.
Chapter 1, SelectIO Resources
input receivers, and gives detailed examples of many standard interfaces.
SelectIO Logic Resources
double-data rate (DDR) operation, and the programmable input delay (IDELAY) and
programmable output delay (ODELAY).
describes the data serializer/deserializer (SERDES).
The 7 series FPGAs offer both high-performance (HP) and high-range (HR) I/O banks. The
HP I/O banks are designed to meet the performance requirements of high-speed memory
and other chip-to-chip interfaces with voltages up to 1.8V. The HR I/O banks are designed
to support a wider range of I/O standards with voltages up to 3.3V.
the features supported in the HP and HR I/O banks. Refer to
making initial decisions on I/O banks for a particular design's requirements. See the
specific device family data sheet for details on the performance and other electrical
requirements of the HP and HR I/O banks.
The 7 series FPGAs contain different combinations of HR and HP I/O banks. The 7 Series
FPGAs Overview documents the available number of each type of bank for all devices.
Table 1-1: Supported Features in the HR and HP I/O Banks
3.3V I/O standards
2.5V I/O standards
1.8V I/O standards
1.5V I/O standards
1.35V I/O standards
1.2V I/O standards
LVDS signaling
24 mA drive option for LVCMOS18 and LVTTL outputs
V
Digitally-controlled impedance (DCI) and DCI cascading
Internal V
7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
describes the input and output data registers and their
Feature
(1)
(1)
(1)
(1)
(1)
(1)
supply rail
CCAUX_IO
REF
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describes the electrical behavior of the output drivers and
Chapter 3, Advanced SelectIO Logic Resources
Chapter 1
Chapter 2,
Table 1-1 highlights
Table 1-1 for help when
HP I/O Banks HR I/O Banks
N/A Supported
N/A Supported
Supported Supported
Supported Supported
Supported Supported
Supported Supported
(2)
Supported Supported
N/A Supported
Supported N/A
Supported N/A
Supported Supported
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