Sstl15_R, Sstl135_R, Diff_Sstl15_R, Diff_Sstl135_R; Sstl18_I, Diff_Sstl18_I; Sstl18_I_Dci, Diff_Sstl18_I_Dci - Xilinx SelectIO 7 Series User Manual

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Chapter 1:
SelectIO Resources

SSTL15_R, SSTL135_R, DIFF_SSTL15_R, DIFF_SSTL135_R

Table 1-30: Available I/O Bank Type
The reduced drive-strength R standards are versions of the standard drivers, which can be
preferred for short, point-to-point board topologies. Parallel end-termination resistors
(commonly 50Ω) to V
The differential (DIFF_) versions use complementary single-ended drivers for outputs and
differential receivers for inputs.

SSTL18_I, DIFF_SSTL18_I

Table 1-31: Available I/O Bank Type
These standards are only available for unidirectional (input or output) signals. Class-I
drivers can be preferred for short, point-to-point board topologies. Parallel
end-termination resistors (commonly 50Ω) to V
board close to any receiver. The differential (DIFF_) version uses complementary
single-ended drivers for outputs and differential receivers for inputs.

SSTL18_I_DCI, DIFF_SSTL18_I_DCI

Table 1-32: Available I/O Bank Type
These standards are only available for unidirectional (input or output) signals. Class-I
drivers can be preferred for short, point-to-point board topologies. DCI provides tuned
internal parallel split-termination resistors that are always present (for receivers). The
value of both the pull-up and pull-down resistors mirror the resistance measured on the
VRN/VRP pins, creating the Thevenin equivalent resistance to the V
level. The differential (DIFF_) version uses complementary single-ended drivers for
outputs and differential receivers for inputs.
SSTL18_II, SSTL15, SSTL135, DIFF_SSTL18_II, DIFF_SSTL15,
DIFF_SSTL135
Table 1-33: Available I/O Bank Type
Parallel end-termination resistors (commonly 50Ω) to V
on the board close to any receiver. The differential (DIFF_) versions use complementary
single-ended drivers for outputs and differential receivers for inputs.
76
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HR
HP
Available
N/A
= (V
TT
CCO
HR
HP
Available
Available
HR
HP
N/A
Available
HR
HP
Available
Available
www.xilinx.com
/2) are typically placed on the board close to any receiver.
= (V
TT
CCO
= (V
TT
7 Series FPGAs SelectIO Resources User Guide
/2) are typically placed on the
/2 mid-point
CCO
/2) are typically placed
CCO
UG471 (v1.10) May 8, 2018

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