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Chapter 1:
SelectIO Resources
X-Ref Target - Figure 1-14
32
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SSTL18_I
Conventional
Z 0
DCI Transmit
Conventional
Z 0
Receive
7 Series FPGA
HP Bank DCI
Conventional
Transmit
Z 0
DCI Receive
DCI Transmit
Z 0
DCI Receive
Bidirectional
N/A
Reference
VRN = VRP = 2R = 2Z 0
Resistor
50Ω
Recommended
Z 0
Notes:
1. Z 0 is the recommended PCB trace impedance.
Figure 1-14: SSTL DCI Usage Examples
www.xilinx.com
SSTL18_II
V
/2
V
/2
V
CCO
CCO
R
R
R
Z 0
V
/2
V
CCO
V
CCO
CCO
R
2R
R
Z 0
2R
7 Series FPGA
HP Bank DCI
V
V
/2
CCO
CCO
2R
R
Z 0
2R
7 Series FPGA
HP Bank DCI
V
V
CCO
CCO
2R
2R
Z 0
2R
2R
7 Series FPGA
7 Series FPGA
HP Bank DCI
HP Bank DCI
V
CCO
2R
Z 0
2R
7 Series FPGA
HP Bank DCI
VRN = VRP = 2R = 2Z 0
50Ω
ug471_c1_16_042413
7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
/2
CCO
/2
V
CCO
2R
2R
7 Series FPGA
HP Bank DCI
V
CCO
2R
2R
7 Series FPGA
HP Bank DCI
V
CCO
2R
2R
7 Series FPGA
HP Bank DCI
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