Xilinx Spartan-3E Manuals

Manuals and User Guides for Xilinx Spartan-3E. We have 2 Xilinx Spartan-3E manuals available for free PDF download: User Manual, Quick Start Manual

Xilinx Spartan-3E User Manual (164 pages)

Starter kit Board

Brand: Xilinx | Category: Motherboard | Size: 7 MB

Revision History
2
Table of Contents
3
FPGA Configurations Settings, Platform Flash PROM, SPI Serial Flash, JTAG
7
FPGA I/O Banks 2 and 3" • "Power Supply Decoupling
7
RS-232 Ports, VGA Port, and PS/2 Port
7
This Appendix Provides the Following Circuit Board Schematics:
7
Preface: about this Guide

9
- Acknowledgements
  
  9
- Guide Contents
  
  9
- Additional Resources
  
  10
  - XC2C64A Coolrunner-II CPLD
    10
Chapter 1: Introduction and Overview

11
Chapter 2: Switches, Buttons, and Knob

15
- Slide Switches
  
  15
  - Locations and Labels
    15
  - Operation
    15
  - UCF Location Constraints
    15
- Push-Button Switches
  
  16
  - Locations and Labels
    16
  - Operation
    16
  - UCF Location Constraints
    17
- Rotary Push-Button Switch
  
  17
  - Locations and Labels
    17
  - Operation
    17
    
    Push-Button Switch
    17
    
    Rotary Shaft Encoder
    18
  - UCF Location Constraints
    19
- Discrete Leds
  
  19
  - Locations and Labels
    19
  - Operation
    20
  - UCF Location Constraints
    20
- Related Resources
  
  20
Chapter 3: Clock Sources

21
- Overview
  
  21
- Auxiliary Clock Oscillator Socket
  
  22
- SMA Clock Input or Output Connector
  
  22
- UCF Constraints
  
  22
  - Location
    22
  - Clock Period Constraints
    23
- Clock Connections
  
  22
- Voltage Control
  
  22
- 50 Mhz On-Board Oscillator
  
  22
- Related Resources
  
  23
Chapter 4: FPGA Configuration Options

25
Chapter 5: Character LCD Screen

41
- Overview
  
  41
- Character LCD Interface Signals
  
  42
- Voltage Compatibility
  
  42
- Interaction with Intel Strataflash
  
  42
- UCF Location Constraints
  
  43
- LCD Controller
  
  43
  - Memory Map
    43
    
    DD Ram
    43
    
    Cg Rom
    44
    
    Cg Ram
    45
  - Command Set
    46
    
    Disabled
    47
    
    Clear Display
    47
    
    Return Cursor Home
    47
    
    Entry Mode Set
    47
    
    Display On/Off
    48
    
    Cursor and Display Shift
    48
    
    Function Set
    49
    
    Set CG RAM Address
    49
    
    Set DD RAM Address
    49
    
    Read Busy Flag and Address
    49
    
    Write Data to CG RAM or DD RAM
    49
    
    Read Data from CG RAM or DD RAM
    50
- Operation
  
  50
- Related Resources
  
  52
Chapter 6: VGA Display Port

53
- Signal Timing for a 60 Hz, 640X480 VGA Display
  
  54
- VGA Signal Timing
  
  56
- UCF Location Constraints
  
  57
- Related Resources
  
  57
Chapter 7 : RS-232 Serial Ports

59
- Overview
  
  59
- UCF Location Constraints
  
  60
Chapter 8: PS/2 Mouse/Keyboard Port

61
- Keyboard
  
  62
- Mouse
  
  64
- Voltage Supply
  
  65
- UCF Location Constraints
  
  65
- Related Resources
  
  65
Chapter 9: Digital to Analog Converter (DAC)

67
- SPI Communication
  
  67
- Specifying the DAC Output Voltage
  
  70
  - DAC Outputs a and B
    70
  - DAC Outputs C and D
    70
- UCF Location Constraints
  
  71
- Related Resources
  
  71
Chapter 10: Analog Capture Circuit

73
- Digital Outputs from Analog Inputs
  
  74
- Programmable Pre-Amplifier
  
  75
  - Interface
    75
  - Programmable Gain
    75
  - SPI Control Interface
    76
  - UCF Location Constraints
    77
- Analog to Digital Converter (ADC)
  
  77
  - Interface
    77
  - SPI Control Interface
    77
  - UCF Location Constraints
    78
- Connecting Analog Inputs
  
  79
- Related Resources
  
  79
- Disable Other Devices on the SPI Bus to Avoid Contention
  
  79
Chapter 11: Intel Strataflash Parallel nor Flash PROM

81
- Strataflash Connections
  
  82
- Shared Connections
  
  85
  - Character LCD
    85
  - Xilinx XC2C64A CPLD
    85
  - SPI Data Line
    85
- UCF Location Constraints
  
  86
  - Address
    86
  - Data
    86
  - Control
    87
- Setting the FPGA Mode Select Pins
  
  87
- Related Resources
  
  87
Chapter 12: SPI Serial Flash

89
Chapter 13: DDR SDRAM

103
- DDR SDRAM Connections
  
  104
- UCF Location Constraints
  
  106
  - Address
    106
  - Data
    106
  - Control
    107
  - Reserve FPGA VREF Pins
    107
- Related Resources
  
  107
Chapter 14: 10/100 Ethernet Physical Layer Interface

110
- Ethernet PHY Connections
  
  110
- Microblaze Ethernet IP Cores
  
  111
- UCF Location Constraints
  
  112
- Related Resources
  
  112
Chapter 15: Expansion Connectors

113
- Hirose 100-Pin FX2 Edge Connector (J3)
  
  113
  - Voltage Supplies to the Connector
    114
  - Connector Pinout and FPGA Connections
    114
  - Compatible Board
    116
  - Mating Receptacle Connectors
    116
  - Differential I/O
    116
    
    Using Differential Inputs
    118
    
    Using Differential Outputs
    119
  - UCF Location Constraints
    119
- Six-Pin Accessory Headers
  
  121
  - Header J1
    121
  - Header J2
    121
  - Header J4
    122
- UCF Location Constraints
  
  122
- Connectorless Debugging Port Landing Pads (J6)
  
  123
- Related Resources
  
  124
Chapter 16: XC2C64A Coolrunner-II CPLD

125
- UCF Location Constraints
  
  127
  - FPGA Connections to CPLD
    127
  - Cpld
    127
- Related Resources
  
  128
Chapter 17: DS2432 1-Wire SHA-1 EEPROM

129
- UCF Location Constraints
  
  129
- Related Resources
  
  129
Appendix A: Schematics

132

Xilinx Spartan-3E Quick Start Manual (2 pages)

Brand: Xilinx | Category: Computer Hardware | Size: 0 MB

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Motherboard Computer Hardware Microcontrollers Transceiver Controller

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Xilinx Spartan-3E Manuals

Xilinx Spartan-3E User Manual (164 pages)

Table of Contents

Preface: about this Guide

Acknowledgements

Guide Contents

Additional Resources

Chapter 1: Introduction and Overview

Choose the Starter Kit Board for Your Needs

Key Components and Features

Design Trade-Offs

Related Resources

Chapter 2: Switches, Buttons, and Knob

Slide Switches

Push-Button Switches

Rotary Push-Button Switch

Discrete Leds

Related Resources

Chapter 3: Clock Sources

Overview

Auxiliary Clock Oscillator Socket

SMA Clock Input or Output Connector

UCF Constraints

Clock Connections

Voltage Control

50 Mhz On-Board Oscillator

Related Resources

Chapter 4: FPGA Configuration Options

Configuration Mode Jumpers

PROG Push Button

DONE Pin LED

Programming the FPGA, CPLD, or Platform Flash PROM Via USB

Chapter 5: Character LCD Screen

Overview

Character LCD Interface Signals

Voltage Compatibility

Interaction with Intel Strataflash

UCF Location Constraints

LCD Controller

Operation

Related Resources

Chapter 6: VGA Display Port

Signal Timing for a 60 Hz, 640X480 VGA Display

VGA Signal Timing

UCF Location Constraints

Related Resources

Chapter 7 : RS-232 Serial Ports

Overview

UCF Location Constraints

Chapter 8: PS/2 Mouse/Keyboard Port

Keyboard

Mouse

Voltage Supply

UCF Location Constraints

Related Resources

Chapter 9: Digital to Analog Converter (DAC)

SPI Communication

Specifying the DAC Output Voltage

UCF Location Constraints

Related Resources

Chapter 10: Analog Capture Circuit

Digital Outputs from Analog Inputs

Programmable Pre-Amplifier

Analog to Digital Converter (ADC)

Connecting Analog Inputs

Related Resources

Disable Other Devices on the SPI Bus to Avoid Contention

Chapter 11: Intel Strataflash Parallel nor Flash PROM

Strataflash Connections

Shared Connections

UCF Location Constraints

Setting the FPGA Mode Select Pins

Related Resources

Chapter 12: SPI Serial Flash

UCF Location Constraints

Configuring from SPI Flash

Additional Design Details

Related Resources

Chapter 13: DDR SDRAM

DDR SDRAM Connections