Xilinx SelectIO 7 Series User Manual page 184

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Appendix A:
Termination Options for SSO Noise Analysis
Table A-1:
LVCMOS (all voltages)
LVTTL (12 mA, 16 mA, and 24 mA drive)
MOBILE_DDR
SSTL12
SSTL12_DCI
SSTL12_T_DCI
SSTL135
SSTL135_DCI
SSTL135_R
SSTL135_T_DCI
SSTL15
SSTL15_DCI
SSTL15_R
SSTL15_T_DCI
SSTL18_I
SSTL18_I_DCI
SSTL18_II
SSTL18_II_DCI
SSTL18_II_T_DCI
BLVDS_25
HSLVDCI_15
HSLVDCI_18
LVDCI_15
LVDCI_18
LVDCI_DV2_15
LVDCI_DV2_18
LVDS
LVDS_25
MINI_LVDS_25
PCI33_3
PPDS_25
RSDS_25
184
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Default Terminations for SSN Noise Analysis by I/O Standard (Cont'd)
(1)
IO Standard
www.xilinx.com
Default Termination
Far V
50Ω
TT
None
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Far V
50Ω
TT
Near V
50Ω & Far V
TT
TT
Far V
50Ω
TT
Far V
50Ω
TT
Near Series 165Ω, Near Differential 140Ω, and
Far Differential 100Ω
None
None
None
None
None
None
Far Differential 100Ω
Far Differential 100Ω
Far Differential 100Ω
None
Far Differential 100Ω
Far Differential 100Ω
7 Series FPGAs SelectIO Resources User Guide
UG471 (v1.10) May 8, 2018
50Ω

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