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Chapter 1:
SelectIO Resources
X-Ref Target - Figure 1-70
Figure 1-71
a board with 50Ω transmission lines.
X-Ref Target - Figure 1-71
Table 1-44
Table 1-44: Allowed Attributes of the LVDS I/O Standards
IOSTANDARD
DIFF_TERM
It is acceptable to have differential inputs such as LVDS and LVDS_25 in I/O banks that are
powered at voltage levels other than the nominal voltages required for the outputs of those
standards (1.8V for LVDS outputs, and 2.5V for LVDS_25 outputs). However, these criteria
must be met:
•
•
92
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External Termination
IOB
LVDS
LVDS_25
Figure 1-70: LVDS or LVDS_25 Receiver Termination
is an example of a differential termination for an LVDS or LVDS_25 receiver on
IOB
LVDS
LVDS_25
Figure 1-71: LVDS or LVDS_25 With DIFF_TERM Receiver Termination
lists the available 7 series FPGA LVDS I/O standards and attributes supported.
Attributes
IBUFDS_DIFF_OUT, or
IBUFGDS_DIFF_OUT
The optional internal differential termination is not used (DIFF_TERM = FALSE,
which is the default value).
The differential signals at the input pins meet the V
Recommended Operating Conditions table of the specific device family data sheet.
www.xilinx.com
Z 0
R DIFF = 2Z 0 = 100Ω
Z 0
IOB
Z
= 50
0
0
Z
= 50
0
0
Primitives
IBUFDS, IBUFGDS,
LVDS (HP I/O Banks) or LVDS_25 (HR I/O Banks)
TRUE, FALSE
IN
7 Series FPGAs SelectIO Resources User Guide
IOB
LVDS
LVDS_25
+
–
ug471_c1_60_011811
LVDS
LVDS_25
+
R DIFF = 100
Data in
–
ug471_c1_61_011811
OBUFDS or OBUFTDS
N/A
requirements in the
UG471 (v1.10) May 8, 2018
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