Agilent Technologies 93000 SOC Series Training Manual page 32

User training part 1
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Test Engineer's Responsibilities
2-3 Designing the DUT Board
Before you design a multi-site DUT board, you need to determine the
tester resources, such as the number of tester channels, the number of
device power supply (DPS) channels and the device pin count. These
are all major issues when designing a multi-site DUT board.
The component placement area is limited, and that in turn limits the
number of sites that can be placed on the DUT board. The number of
sites also depends upon the size of your device. If the device foot print
is too big, then the number of sites will be less than with a device that
has small foot print.
The handler that you have planned to use can also limit the number of
sites. So, planning and selecting the handler before designing the DUT
board also an important task.
32
Agilent 93000 SOC Series User Training Part 1, October 2004

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