Agilent Technologies 93000 SOC Series Training Manual page 31

2-3 Designing the DUT Board
General Layout Rules:
Load Capacitors:
Filter Capacitors (de-caps):
Agilent 93000 SOC Series User Training Part 1, October 2004
When testing at high frequencies, an impedance-matched environment
is required in order to minimize reflections on the transmission lines.
You should design your DUT board to match the tester impedance. A
normal impedance value in high-frequency testing is 50-Ohms (+/- 5%).
• Before selecting the material, check whether the stiffener will be
used at extremely hot or cold temperatures.
• Use pad size of 1.6-1.8mm and a maximum hole diameter of 0.7mm.
You can also make the pads smaller if required.
• Use pogo landing holes
• Trace width 12mil (0.3mm) to keep skin effects and attenuation
negligibly small.
• Make sure that no coupling or shorting out between the handlers
and board can occur when you put traces on the board's outer side.
TDR:
The electrical length of all wiring between the I/O electronics and the
device pins is measured automatically using Time Domain Reflectom-
etry (TDR). These values are used to adjust the Per-Pin timing so that
the differences in wiring lengths become invisible to the user.
DPS: If you need more current that 8A then you can gang the DPS to
generate more than 8A. You can gang up to 16 (small head) or up to 32
(large test head) General Purpose DPS channels in 4 Groups.
The channels of each ganged group have to be in sequence. For
example, DPS11, 12, 13, 14, 21 etc.
Stabilize the DPS operation and prevent voltage drops.
Filter noise-related signals from the DPS pins.
Grounding: If possible, use separate power supply channels for supplying the
digital and analog circuits of the DUT.
If possible, use one ground plane between two signal layers.
Multi-site Design Considerations
A current industry trend to reduce the cost of test is to simultaneously
test as many parts as possible. Identifying the need for a multi-site DUT
board should be considered to reduce the test time and to better utilize
the tester resources.
Test Engineer's Responsibilities
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