Table 207. Device-Mode Control And Status Registers - ST STM32F413 Reference Manual

USB on-the-go full-speed (OTG_FS)
Table 206. Host-mode control and status registers (CSRs) (continued)
Acronym
OTG_HCCHARx
OTG_HCINTx
OTG_HCINTMSKx
OTG_HCTSIZx
Device-mode CSR map
These registers must be programmed every time the core changes to device mode.
Acronym
OTG_DCFG
OTG_DCTL
OTG_DSTS
OTG_DIEPMSK
OTG_DOEPMSK
OTG_DAINT
OTG_DAINTMSK
OTG_DVBUSDIS
OTG_DVBUSPULSE
1122/1284
Offset
address
0x500
0x520
OTG Host channel-x characteristics register (OTG_HCCHARx) (x = 0..11,
where x = Channel_number) on page 1159
...
0x660
0x508
0x528
OTG Host channel-x interrupt register (OTG_HCINTx) (x = 0..11, where
x = Channel_number) on page 1160
....
0x668
0x50C
0x52C
OTG Host channel-x interrupt mask register (OTG_HCINTMSKx)
(x = 0..11, where x = Channel_number) on page 1161
....
0x66C
0x510
0x530
OTG Host channel-x transfer size register (OTG_HCTSIZx) (x = 0..11,
where x = Channel_number) on page 1162
....
0x670

Table 207. Device-mode control and status registers

Offset
address
0x800 OTG device configuration register (OTG_DCFG) on page 1163
0x804 OTG device control register (OTG_DCTL) on page 1164
0x808 OTG device status register (OTG_DSTS) on page 1167
OTG device IN endpoint common interrupt mask register
0x810
(OTG_DIEPMSK) on page 1168
OTG device OUT endpoint common interrupt mask register
0x814
(OTG_DOEPMSK) on page 1169
OTG device all endpoints interrupt register (OTG_DAINT) on
0x818
page 1169
OTG all endpoints interrupt mask register (OTG_DAINTMSK) on
0x81C
page 1170
OTG device VBUS discharge time register (OTG_DVBUSDIS) on
0x828
page 1171
OTG device VBUS pulsing time register (OTG_DVBUSPULSE) on
0x82C
page 1171
DocID029473 Rev 3
Register name
Register name
RM0430