RM0430
33.15.15 OTG Host periodic transmit FIFO size register
(OTG_HPTXFSIZ)
Address offset: 0x100
Reset value: 0x0200 0400
31
30
29
rw
rw
rw
15
14
13
rw
rw
rw
Bits 31:16 PTXFD: Host periodic Tx FIFO depth
This value is in terms of 32-bit words.
Minimum value is 16
Bits 15:0 PTXSA: Host periodic Tx FIFO start address
This field configures the memory start address for periodic transmit FIFO RAM.
33.15.16 OTG device IN endpoint transmit FIFO size register
(OTG_DIEPTXFx) (x = 1..5, where x is the
FIFO_number)
Address offset: 0x104 + (FIFO_number – 1) × 0x04
Reset values:
FIFO_number = 5: 0x0200 0200 + (5
31
30
29
rw
rw
rw
15
14
13
rw
rw
rw
Bits 31:16 INEPTXFD: IN endpoint Tx FIFO depth
Bits 15:0 INEPTXSA: IN endpoint FIFOx transmit RAM start address
28
27
26
25
rw
rw
rw
rw
12
11
10
9
rw
rw
rw
rw
28
27
26
25
rw
rw
rw
rw
12
11
10
9
rw
rw
rw
rw
This value is in terms of 32-bit words.
Minimum value is 16
This field contains the memory start address for IN endpoint transmit FIFOx. The address
must be aligned with a 32-bit memory location.
DocID029473 Rev 3
USB on-the-go full-speed (OTG_FS)
24
23
22
21
PTXFSIZ
rw
rw
rw
rw
8
7
6
5
PTXSA
rw
rw
rw
rw
*
0x200)
24
23
22
21
INEPTXFD
rw
rw
rw
rw
8
7
6
5
INEPTXSA
rw
rw
rw
rw
20
19
18
17
rw
rw
rw
rw
4
3
2
1
rw
rw
rw
rw
20
19
18
17
rw
rw
rw
rw
4
3
2
1
rw
rw
rw
rw
1151/1284
16
rw
0
rw
16
rw
0
rw
1245
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