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ST STM32F413 Reference Manual page 1143

Advanced arm-based 32-bit mcus
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RM0430
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 RXFD: Rx FIFO depth
33.15.10 OTG Host non-periodic transmit FIFO size register
(OTG_HNPTXFSIZ)/Endpoint 0 Transmit FIFO size
(OTG_DIEPTXF0)
Address offset: 0x028
Reset value: 0x0200 0200
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Host mode
Bits 31:16 NPTXFD: Non-periodic Tx FIFO depth
This value is in terms of 32-bit words.
Minimum value is 16
Programmed values must respect the available FIFO memory allocation and must not
exceed the power-on value.
Bits 15:0 NPTXFSA: Non-periodic transmit RAM start address
This field configures the memory start address for non-periodic transmit FIFO RAM.
Device mode
Bits 31:16 TX0FD: Endpoint 0 Tx FIFO depth
This value is in terms of 32-bit words.
Minimum value is 16
Programmed values must respect the available FIFO memory allocation and must not
exceed the power-on value.
Bits 15:0 TX0FSA: Endpoint 0 transmit RAM start address
This field configures the memory start address for the endpoint 0 transmit FIFO RAM.
This value is in terms of 32-bit words.
Minimum value is 16
Programmed values must respect the available FIFO memory allocation and must not
exceed the power-on value.
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DocID029473 Rev 3
USB on-the-go full-speed (OTG_FS)
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NPTXFD/TX0FD
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