USB on-the-go full-speed (OTG_FS)
Bit 16 EONUM: Even/odd frame
DPID: Endpoint data PID
Bit 15 USBAEP: USB active endpoint
Bits 14:11 Reserved, must be kept at reset value.
Bits 10:0 MPSIZ: Maximum packet size
33.15.42 OTG device control OUT endpoint 0 control register
(OTG_DOEPCTL0)
Address offset: 0xB00
Reset value: 0x0000 8000
This section describes the OTG_DOEPCTL0 register. Nonzero control endpoints use
registers for endpoints 1–3.
31
30
29
EPENA EPDIS
Res.
Res.
w
r
15
14
13
USBA
Res.
Res.
Res.
EP
r
1176/1284
Applies to isochronous IN endpoints only.
Indicates the frame number in which the core transmits/receives isochronous data for this
endpoint. The application must program the even/odd frame number in which it intends to
transmit/receive isochronous data for this endpoint using the SEVNFRM and SODDFRM
fields in this register.
0: Even frame
1: Odd frame
Applies to interrupt/bulk IN endpoints only.
Contains the PID of the packet to be received or transmitted on this endpoint. The
application must program the PID of the first packet to be received or transmitted on this
endpoint, after the endpoint is activated. The application uses the SD0PID register field to
program either DATA0 or DATA1 PID.
0: DATA0
1: DATA1
Indicates whether this endpoint is active in the current configuration and interface. The core
clears this bit for all endpoints (other than EP 0) after detecting a USB reset. After receiving
the SetConfiguration and SetInterface commands, the application must program endpoint
registers accordingly and set this bit.
The application must program this field with the maximum packet size for the current logical
endpoint. This value is in bytes.
28
27
26
25
SNAK
CNAK
Res.
w
w
12
11
10
9
Res.
Res.
Res.
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
DocID029473 Rev 3
21
20
19
18
STALL
SNPM
EPTYP
rs
rw
r
5
4
3
Res.
Res.
Res.
Res.
RM0430
17
16
NAK
Res.
STS
r
r
2
1
0
MPSIZ
r
r
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