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ST STM32F413 Reference Manual page 1185

Advanced arm-based 32-bit mcus
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RM0430
33.15.49 OTG device IN endpoint transmit FIFO status register
(OTG_DTXFSTSx) (x = 0..5, where
x = Endpoint_number)
Address offset for IN endpoints: 0x918 + (Endpoint_number × 0x20) This read-only register
contains the free space information for the Device IN endpoint Tx FIFO.
31
30
29
Res.
Res.
Res.
Res.
15
14
13
r
r
r
31:16 Reserved, must be kept at reset value.
15:0 INEPTFSAV: IN endpoint Tx FIFO space available
Indicates the amount of free space available in the Endpoint Tx FIFO.
Values are in terms of 32-bit words:
0x0: Endpoint Tx FIFO is full
0x1: 1 word available
0x2: 2 words available
0xn: n words available
Others: Reserved
33.15.50 OTG device OUT endpoint-x transfer size register
(OTG_DOEPTSIZx) (x = 1..5,
where x = Endpoint_number)
Address offset: 0xB10 + (Endpoint_number × 0x20)
Reset value: 0x0000 0000
The application must modify this register before enabling the endpoint. Once the endpoint is
enabled using Endpoint Enable bit of the OTG_DOEPCTLx registers (EPENA bit in
OTG_DOEPCTLx), the core modifies this register. The application can only read this
register once the core has cleared the Endpoint enable bit.
31
30
29
RXDPID/
Res.
STUPCNT
r/rw
r/rw
15
14
13
rw
rw
rw
28
27
26
25
Res.
Res.
Res.
12
11
10
9
r
r
r
r
28
27
26
25
rw
rw
rw
rw
12
11
10
9
rw
rw
rw
rw
DocID029473 Rev 3
USB on-the-go full-speed (OTG_FS)
24
23
22
21
Res.
Res.
Res.
Res.
8
7
6
5
INEPTFSAV
r
r
r
r
24
23
22
21
PKTCNT
rw
rw
rw
rw
8
7
6
5
XFRSIZ
rw
rw
rw
rw
20
19
18
17
Res.
Res.
Res.
Res.
4
3
2
1
r
r
r
r
20
19
18
17
XFRSIZ
rw
rw
rw
rw
4
3
2
1
rw
rw
rw
rw
16
Res.
0
r
16
rw
0
rw
1185/1284
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