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ST STM32F413 Reference Manual page 1144

Advanced arm-based 32-bit mcus
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USB on-the-go full-speed (OTG_FS)
33.15.11 OTG non-periodic transmit FIFO/queue status register
(OTG_HNPTXSTS)
Address offset: 0x02C
Note:
Reset value: 0x0008 0200 In Device mode, this register is not valid.
This read-only register contains the free space information for the non-periodic Tx FIFO and
the non-periodic transmit request queue.
31
30
29
Res.
r
r
15
14
13
r
r
r
Bit 31 Reserved, must be kept at reset value.
Bits 30:24 NPTXQTOP: Top of the non-periodic transmit request queue
Bits 23:16 NPTQXSAV: Non-periodic transmit request queue space available
Bits 15:0 NPTXFSAV: Non-periodic Tx FIFO space available
1144/1284
28
27
26
25
NPTXQTOP
r
r
r
r
12
11
10
9
r
r
r
r
Entry in the non-periodic Tx request queue that is currently being processed by the MAC.
Bits 30:27: Channel/endpoint number
Bits 26:25:
00: IN/OUT token
01: Zero-length transmit packet (device IN/host OUT)
11: Channel halt command
Bit 24: Terminate (last entry for selected channel/endpoint)
Indicates the amount of free space available in the non-periodic transmit request queue.
This queue holds both IN and OUT requests.
0: Non-periodic transmit request queue is full
1: 1 location available
2: locations available
n: n locations available (0 ≤ n ≤ 8)
Others: Reserved
Indicates the amount of free space available in the non-periodic Tx FIFO.
Values are in terms of 32-bit words.
0: Non-periodic Tx FIFO is full
1: 1 word available
2: 2 words available
n: n words available (where 0 ≤ n ≤ 512)
Others: Reserved
24
23
22
r
r
r
8
7
6
NPTXFSAV
r
r
r
DocID029473 Rev 3
21
20
19
18
NPTQXSAV
r
r
r
r
5
4
3
2
r
r
r
r
RM0430
17
16
r
r
1
0
r
r

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