Trap Instruction - Hitachi H8S/2646 Hardware Manual

Hitachi 16-bit single-chip microcomputer h8s/2646 series
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4.5

Trap Instruction

Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction
exception handling can be executed at all times in the program execution state.
The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector
number from 0 to 3, as specified in the instruction code.
Table 4-4 shows the status of CCR and EXR after execution of trap instruction exception
handling.
Table 4-4
Status of CCR and EXR after Trap Instruction Exception Handling
Interrupt Control Mode
0
2
Legend
1: Set to 1
0: Cleared to 0
—: Retains value prior to execution.
CCR
I
UI
1
1
EXR
I2 to I0
T
0
97

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