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20.11.8 Programmer Mode Transition Time ..................................................................... 707
20.11.9 Notes on Memory Programming .......................................................................... 708
20.12 Flash Memory and Power-Down States ............................................................................ 709
20.12.1 Notes on Power-Down States ............................................................................... 709
20.13 Flash Memory Programming and Erasing Precautions...................................................... 710
Section 21 Clock Pulse Generator .....................................................................715
21.1 Overview............................................................................................................................ 715
21.1.1 Block Diagram...................................................................................................... 715
21.1.2 Register Configuration.......................................................................................... 716
21.2 Register Descriptions ......................................................................................................... 716
21.2.1 System Clock Control Register (SCKCR)............................................................ 716
21.2.2 Low-Power Control Register (LPWRCR)............................................................ 717
21.3 Oscillator............................................................................................................................ 718
21.3.1 Connecting a Crystal Resonator............................................................................ 718
21.4 PLL Circuit ........................................................................................................................ 721
21.5 Medium-Speed Clock Divider ........................................................................................... 721
21.6 Bus Master Clock Selection Circuit................................................................................... 721
21.7 Subclock Oscillator............................................................................................................ 722
21.8 Subclock Waveform Generation Circuit............................................................................ 723
21.9 Note on Crystal Resonator ................................................................................................. 723
Section 22 Power-Down Modes ........................................................................725
22.1 Overview............................................................................................................................ 725
22.1.1 Register Configuration.......................................................................................... 729
22.2 Register Descriptions ......................................................................................................... 730
22.2.1 Standby Control Register (SBYCR) ..................................................................... 730
22.2.2 System Clock Control Register (SCKCR)............................................................ 732
22.2.3 Low-Power Control Register (LPWRCR)............................................................ 733
22.2.4 Timer Control/Status Register (TCSR) ................................................................ 736
22.2.5 Module Stop Control Register (MSTPCR)........................................................... 737
22.3 Medium-Speed Mode......................................................................................................... 738
22.4 Sleep Mode ........................................................................................................................ 739
22.4.1 Sleep Mode ........................................................................................................... 739
22.4.2 Exiting Sleep Mode .............................................................................................. 739
22.5 Module Stop Mode ............................................................................................................ 740
22.5.1 Module Stop Mode ............................................................................................... 740
22.5.2 Usage Notes .......................................................................................................... 741
22.6 Software Standby Mode..................................................................................................... 742
22.6.1 Software Standby Mode........................................................................................ 742
22.6.2 Clearing Software Standby Mode......................................................................... 742
22.6.4 Software Standby Mode Application Example .................................................... 743
xiv
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